This part of IEC 61188 provides information on land pattern geometries used for the surface attachment of electronic components with area array terminations in the form of solder balls, solder columns or protective coated lands. The intent of the information presented herein is to provide the appropriate size, shape and tolerances of surface mount land patterns to ensure sufficient area for the appropriate solder joint, and also allow for inspection, testing and reworking of those solder joints. Each clause contains a specific set of criteria such that the information presented is consistent, providing information on the component, the component dimensions, the solder joint design and the land pattern dimensions. The land pattern dimensions are based on a mathematical model that establishes a platform for a solder joint attachment to the printed board. The existing models create a platform that is capable of establishing a reliable solder joint no matter which solder alloy is used to make that joint (lead-free, tin lead, etc.). Process requirements for solder reflow are different depending on the solder alloy and should be analyzed so that the process is taking place above the liquidus temperature of the alloy, and remains above that temperature a sufficient time to form a reliable metallurgical bond. Area array land patterns do not use "land protrusion" concepts and attempt to match the characteristics of the physical and dimensional termination properties.
IEC 61188-5-8-2007由國際電工委員會 IX-IEC 發布于 2007-10。
IEC 61188-5-8-2007 在中國標準分類中歸屬于: L30 印制電路,在國際標準分類中歸屬于: 31.180 印制電路和印制電路板。
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